The size of the typical Internet Protocol (IP) route table has increased by an order of magnitude in the last few years. The dramatic growth of routing tables necessitates more router memory space and processing power. For example, the number of prefixes in the Border Gateway Protocol (BGP) core routing table is approximately 240,000, and is increasing.
As the number of IP routes increases, an increasing amount of memory is required for both slow path forwarding and fast path forwarding (data plane) of a routing switch device.
The data (or forwarding) plane defines the part of a router architecture that decides what to do with packets arriving on an inbound interface. Most commonly, the data plane references a forwarding/route table to look up the destination address in the incoming packet header, and retrieve information that describes the outgoing interface(s) through which to send the incoming packet. The data plane generally stores IP routes of the forwarding/route table in specialized hardware designed for efficient lookup. One example of such hardware is a ternary content addressable memory, or TCAM.
As the IP forwarding/route table size increases, it requires more TCAM space. TCAMs are expensive chips and they consume more power and dissipate more heat, which imposes significant challenges on the system designer. Thus, increasing the number of TCAM chips on a routing switch device is not a practical or cost effective alternative. Insufficient TCAM space for IP routes may result in un-deterministic IP forwarding behavior. In other words, some of the data traffic might be forwarded along a non-optimal path; some data traffic might be slow-path forwarded and some data traffic may not get forwarded at all (e.g., a packet is dropped) due to the limited capacity of the control plane forwarding engine.